Research Assistant (RTH)
- Sha Tin, Hong Kong
- Permanent
- Full-time
- ASIC design, FPGA prototyping, AI algorithm design;
- Strong programming skills of at least one of the following languages: Verilog/VHDL, System Verilog, Python, C/C++, Matlab;
- R&D experiences of using Cadence and Synopsys EDA tools or machine learning frameworks such as Caffe, Tensorflow and PyTorch.
Contract length: 12 monthsPay: $20,000.00 - $23,000.00 per monthBenefits:
- Dental insurance
- Maternity leave
- Medical Insurance
- Work from home
CTgoodjobs